Process and device simulation of 80nm CMOS inverter using Sentaurus Synopsys TCAD - Sulong, Muhammad Suhaimi (2008)
Nowadays, the simple manufacturing process of CMOS transistor is widely used in digital design implementation. Using the latest technology in fabrication, the sizes of semiconductor devices are ever shrinking toward the nanotechnology. This paper presents the development of 80nm gate length of CMOS inverter with modification of the theoretical values in order to obtained more accurate process parameters. Simulation of the process and device fabrication using Sentaurus Synopsys TCAD has been carried out and the electrical characteristics of the device were studied and analyzed. The result of the study indicates that the operational of CMOS inverter was at VT = 0.499V, Ioff =79.08pA/ m and IDSAT = 429.3 A/ m for NMOS device. The values were then compared with 90nm CMOS inverter. The study also found that the leakage current of 80nm CMOS transistor is almost twice higher than 90nm CMOS transistor.