APA Citation

Mohd. Hani, M. K. (2007). Optimal routing algorithm for minimizing interconnect delay in VLSI layout design.

Chicago Style Citation

Mohd. Hani, Mohamed Khalil. Optimal Routing Algorithm for Minimizing Interconnect Delay in VLSI Layout Design. 2007.

MLA Citation

Mohd. Hani, Mohamed Khalil. Optimal Routing Algorithm for Minimizing Interconnect Delay in VLSI Layout Design. 2007.

Warning: These citations may not always be 100% accurate.