APA Citation

Chow, C. S. (2012). System verilog RTL modeling with embedded assertions.

Chicago Style Citation

Chow, Chee Siang. System Verilog RTL Modeling With Embedded Assertions. 2012.

MLA Citation

Chow, Chee Siang. System Verilog RTL Modeling With Embedded Assertions. 2012.

Warning: These citations may not always be 100% accurate.