Design of a route lookup processor for implementation in a FPGA-based system-on chip (SoC)

mengikut Teh , J-Wing
Diterbitkan 2004

SVA checker generator for FPGA-based verification platform

mengikut Mohamad, N., Ooi, C. Y., Ismail, N., Teh, J.
Diterbitkan 2016

FPGA implementation of log-polar mapping

mengikut Wong, W.K., Choo, C.W., Loo, C.K., Teh, J.P.
Diterbitkan 2010

Ultra low dose CT screen-detected non-malignant incidental findings in the Western Australian Asbestos Review Programme

mengikut Murray, C., Wong, P., Teh, J., de Klerk, N., Rosenow, T., Alfonso, Helman, Reid, Alison, Franklin, P., Musk, A., Brims, F.
Diterbitkan 2016

Ultra-low-dose chest computer tomography screening of an asbestos-exposed population in Western Australia

mengikut Brims, F., Murray, C., De Klerk, N., Alfonso, Helman, Reid, Alison, Manners, D., Wong, P., Teh, J., Olsen, N., Mina, R., Musk, A.
Diterbitkan 2015