Chess digital clock
The purpose of my project is to design and implement of the Chess Digital Clock. The project employs ISE software (ISE Design Suite 10.1) and implementation on Field-Programmable Gate Arrays (FPGAs) Xilinx board. It is a new technique for testing the interconnects of an arbitrary design mapped into...
Saved in:
| 主要作者: | |
|---|---|
| 格式: | Undergraduates Project Papers |
| 出版: |
2008
|
| 主题: | |
| 在线阅读: | http://umpir.ump.edu.my/499/ http://umpir.ump.edu.my/499/1/ROSMIRA_BINTI_ROSLAN.pdf |
| 标签: |
添加标签
没有标签, 成为第一个标记此记录!
|