Cardiac excitation modeling: HDL coder optimization towards FPGA stand-alone Implementation
The aim of this paper is to discuss the optimization of the hardware description language (HDL) design using fixedpoint optimization and speed optimization through a pipelining method. This optimization is very crucial to achieve the best performance in terms of speed, area and power consumption of...
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| Main Authors: | , , , , |
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| Format: | Conference or Workshop Item |
| Published: |
2014
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| Subjects: | |
| Online Access: | http://eprints.uthm.edu.my/6570/ http://eprints.uthm.edu.my/6570/1/Cardiac_Excitation_Modeling.pdf |
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| Summary: | The aim of this paper is to discuss the optimization
of the hardware description language (HDL) design using fixedpoint
optimization and speed optimization through a pipelining
method. This optimization is very crucial to achieve the best
performance in terms of speed, area and power consumption of
the generated HDL code before deploying the field
programmable gate array (FPGA) stand-alone implementation.
As computational mathematical modeling needs immense
amounts of simulation time, FPGA could bring the solutions as it
provides high performance, and able to perform real-time
simulations and compute in parallel mode operation. In this
study, in order to ease verification, prototyping, and
implementation FPGA, rapid prototyping model-based design
approach of HDL Coder from MathWorks has been used to
automate HDL codes generation from a designed MATLAB
Simulink blocks of Luo-Rudy Phase I (LR-I) model towards
FPGA hardware-implemented for numerical solutions of
ordinary differential equations (ODEs) responsible in generating
the action potential (AP) waveform of mammalian cardiac
ventricle cell. By using HDL Coder, the model is successfully
converted into an optimal fixed-point VHDL design and the
operating frequency is increased from 9.819 MHz to 23. 613MHz
by pipelining optimization. |
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