A tightly coupled finite field arithmetic hardware in an FPGA-based embedded processor core for elliptic curve cryptography
This work presents the implementation of a tightly-coupled hardware architectural enhancement to the Altera FPGA-based Nios II embedded processor. The goal is to accelerate finite field arithmetic operations in the binary fields of F2163 and F2193, for application in a high-performance embedded syst...
Saved in:
| Main Authors: | , , |
|---|---|
| Format: | Article |
| Published: |
Elsevier
2009
|
| Subjects: | |
| Online Access: | http://eprints.utm.my/12912/ http://eprints.utm.my/12912/ http://eprints.utm.my/12912/ |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|