Characterization of fabrication process noises for 32nm NMOS devices

mengikut Elgomati, H.A., Majlis, B.Y., Ahmad, I., Ziad, T.
Diterbitkan 2017

Modeling and optimizing of threshold voltage of 32nm NMOS transistor using L18 orthogonal array Taguchi method

mengikut Elgomati, H.A., Majlis, B.Y., Ahmad, I.
Diterbitkan 2017

Cobalt silicide and titanium silicide effects on nano devices

mengikut Elgomati, H.A., Majlis, B.Y., Salehuddin, F., Ahmad, I., Zaharim, A., Hamid, F.A.
Diterbitkan 2017

Analyze of input process parameter variation on threshold voltage in 45nm n-channel MOSFET

mengikut Salehuddin, F., Ahmad, I., Hamid, F.A., Zaharim, A., Elgomati, H.A., Majlis, B.Y.
Diterbitkan 2017

Optimizing 35nm NMOS devices V TH and I LEAK by controlling active area and halo implantation dosage

mengikut Elgomati, H.A., Majlis, B.Y., Salehuddin, F., Ahmad, I., Zaharim, A., Hamid, F.A.
Diterbitkan 2017

Design and optimization of 22 nm gate length high-k/metal gate NMOS transistor

mengikut Afifah Maheran, A.H., Menon, P.S., Ahmad, I., Shaari, S., Elgomati, H.A., Salehuddin, F.
Diterbitkan 2017

Scaling down of the 32 nm to 22 nm gate length NMOS transistor

mengikut Afifah Maheran, A.H., Menon, P.S., Ahmad, I., Elgomati, H.A., Majlis, B.Y., Salehuddin, F.
Diterbitkan 2017

Modelling of process parameters for 32nm PMOS transistor using Taguchi method

mengikut Elgomati, H.A., Majlis, B.Y., Hamid, A.M.A., Susthitha, P.M., Ahmad, I.
Diterbitkan 2017

Optimization of HALO structure effects in 45nm p-type MOSFETs device using Taguchi Method

mengikut Fauziyah, Salehuddin, Ahmad, Ibrahim, Azlee Hamid, Fazrena, Zaharim, Azami, Elgomati, H. A., Yeop Majlis, Burhanuddin, Apte, P. R.
Diterbitkan 2011

Control factors optimization on threshold voltage and leakage current in 22 nm NMOS transistor using Taguchi method

mengikut Afifah Maheran, A.H., Menon, P.S., Ahmad, I., Salehuddin, F., Mohd, A.S., Noor, Z.A., Elgomati, H.A.
Diterbitkan 2017

Design and optimization of 22nm NMOS transistor

mengikut Afifah Maheran, A.H., Menon, P.S., Ahmad, I., Shaari, S., Elgomati, H.A., Majlis, B.Y., Salehuddin, F.
Diterbitkan 2017

Application of Taguchi method in the optimization of process variation for 32nm CMOS technology

mengikut Elgomati, H.A., Majlis, B.Y., Ahmad, I., Salehuddin, F., Hamid, F.A., Zaharim, A., Apte, P.R.
Diterbitkan 2017

Optimization of HALO structure effects in 45nm p-type MOSFETs device using taguchi method

mengikut Salehuddin, F., Ahmad, I., Hamid, F.A., Zaharim, A., Elgomati, H.A., Majlis, B.Y., Apte, P.R.
Diterbitkan 2017

Statistical optimization for process parameters to reduce variability of 32 nm PMOS transistor threshold voltage

mengikut Elgomati, H.A., Majlis, B.Y., Ahmad, I., Salehuddin, F., Hamid, F.A., Zaharim, A., Mohamad, T.Z., Apte, P.R.
Diterbitkan 2017

Optimization of process parameter variation in 45nm p-channel MOSFET using L18 orthogonal array

mengikut Salehuddin, F., Ahmad, I., Hamid, F.A., Zaharim, A., Hamid, A.M.A., Menon, P.S., Elgomati, H.A., Majlis, B.Y., Apte, P.R.
Diterbitkan 2017