Optimization of Channel Length Nano-Scale Sinwt Based Sram Cell
This paper represents a channel length ratio optimization at a different high logic level voltage for 6-Silicon Nanowire Transistors (SiNWT) SRAM cell. This study is the first to demonstrate an optimized length ratio of nanowires with different Vdd of nano-scale SiNWT based SRAM cell. Noise margins...
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| Main Authors: | , , |
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| Format: | Conference or Workshop Item |
| Published: |
EDP Sciences
2015
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| Subjects: | |
| Online Access: | http://dx.doi.org/10.1051/matecconf/20152701009 http://dx.doi.org/10.1051/matecconf/20152701009 http://umpir.ump.edu.my/11734/1/ftech-2015-yasir-Optimization%20of%20Nanowires%20Ratio.pdf |
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