Vertical double gate MOSFET for nanoscale device with fully depleted feature
A fully depleted vertical double gate MOSFET device was revealed with the implementation of oblique rotating implantation (ORI) method in 25 nm silicon pillar thickness. Several devices with various gate lengths (20 - 100 nm) were simulated and evaluated using virtual wafer tool. The implication of...
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| வடிவமà¯: | Book Section |
| வெளியீடபà¯à®ªà®Ÿà¯à®Ÿà®¤à¯: |
Institute of Electrical and Electronics Engineers
2009
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| பகà¯à®¤à®¿à®•à®³à¯: | |
| நிகழà¯à®¨à®¿à®²à¯ˆ அணà¯à®•à®²à¯: | http://eprints.utm.my/13182/ http://eprints.utm.my/13182/ http://eprints.utm.my/13182/ |
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http://eprints.utm.my/13182/http://eprints.utm.my/13182/
http://eprints.utm.my/13182/