Gate length effect on nmos electrical characteristics using tcad tools.
The concept of device scaling in silicon transistor has consistently resulted in better device density and performance. In conventional MOSFETs, control of Ioff for scaled devices requires very thin gate dielectrics and high doping concentrations. The industry roadmap for CMOS technology predicts ph...
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| Main Authors: | , |
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| Format: | Conference or Workshop Item |
| Published: |
2008
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| Subjects: | |
| Online Access: | http://eprints.uthm.edu.my/2293/ http://eprints.uthm.edu.my/2293/1/Gate_length_effect_on.pdf |
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